1. Field of the Invention
This invention relates to methods of fabricating a circuit board, and more particularly, to a method of fabricating a circuit board having a plurality of electrical connection structures.
2. Description of Related Art
With the rapid development in technology, electronic products are capable of being made in a compact size, performed with multiple functions, and operated at a high speed. Therefore, packaging industry has been thriving to come up with advanced or improved semiconductor packages in order to meet the need for high performance electronic products.
A flip chip semiconductor package is one of the most advanced semiconductor packages in the art. The flip chip semiconductor package typically features in forming a plurality of solder bumps on electrode pads formed on an active surface of a semiconductor chip, such that the semiconductor chip can be electrically connected to a packaging substrate by soldering the solder bumps to the corresponding solder joints formed on the packing substrate.
In order to further improve the electrical performance of the electronic product, various passive components, such as resistors, capacitors or inductors, are optionally installed in the semiconductor package for the electronic product. These passive components are mounted on a circuit board or a packaging substrate of the semiconductor package by surface mount technology (SMT). It means that on the circuit board or the packaging substrate different electrical connection structures are required to be formed, so as for them to be soldered with solder joints and surface mount members, respectively. Accordingly, the different electrical connection structures are formed in different height and dimension to meet the requirements for different electrical connection purposes.
Related devices as described above and the methods for fabricating such devices are disclosed in U.S. Pat. Nos. 5,400,948, 5,672,542 and 6,551,917.
Referred to FIGS. 1A to 1E, a solder mask layer 21 is applied on a circuit board body 20 having a plurality of conductive pads 201, and a plurality of openings 211 are formed in the solder mask layer 21 to expose the conductive pads 201, (as shown in FIG. 1A). Followed is the formation of a metal adhesive layer 22 by physical deposition such as sputtering or evaporation, or chemical deposition such as electroless plating, (as shown in FIG. 1B), and a solder material 24 on the metal adhesive layer 22 on a predetermined number of the conductive pads 201 by stencil printing via a stencil 23 with grids 23a, as shown in FIGS. 1C and 1D. Then, a plurality of solder joints 24′ are formed by reflowing the solder material 24 as shown in FIG. 1E. It thus allows a plurality of first electrical first electrical connecting structures to be formed by the conductive pads 201 and the metal adhesive layer 22 where there are no solder joints formed thereabove, and a plurality of secured electrical connection pads to be formed by the solder joints 24′, and the conductive pads 20. As a result, the first electrical connection structures are clearly different in height and dimension from the second electrical connection structures.
However, forming solder joints by stencil printing is accompanied by difficulty in the control of the height of the solder joints during reflow. In consequence, the reflowed solder joints tend to be not equal in height, and thus their electrical connection with a chip or a printed circuit board is adversely affected. Moreover, the formation of the solder joints by stencil by printing the solder material on the conductive pads of the circuit board body is difficult in the control of the amount of the solder material. It thus easily results in the occurrence of a bridging phenomenon between adjacent solder joints and a short circuit problem will accordingly take place.
In other words, solder joints formed by conventional printing methods fail to be fine-pitched, such that there is always a limitation in the application of the current flip chip semiconductor packages.
Accordingly, a critical issue to circuit board manufacturers nowadays involves solving the above drawbacks and meeting the requirements of mechanical and electrical characteristics for solder joints concurrently.